Project Title: “Dynamic Graph Data Structures on reusable operators on FPGA”
Researchers:
Prof. Dr. Jana Giceva, Chair for Software Engineering of Business Information Systems
Motivation:
FPGAs have been demonstrated to speed up graph algorithms (e.g., BFS, PR, WCC) in a high-performance computing context. However, these static FPGA-based graph processing accelerators are not able to incorporate updates (edge insertions and deletions) to the graph they are processing. This hinders their wide adoption and in particular their applicability in databases. Our research aims to address current issues and find solutions for them.
Project Start: 2021
Project End: 2022 (expected)
Chair:
Prof. Dr. Jana Giceva, Professorship for Database Sytems